An Easy-To-Use LCR Meter
Miguel‘s portable LCR meter makes it easy to analyze the analog
performance of virtually any device under test， whether in the lab
or on the job.The dsPIC30F4012-based meter uses DDS techniques and
DSP methods to condition the resulting voltage and current signals.
Its handy user interface and graphic LCD make it easy to operate
and read.
In the back of my mind， I keep two lists of tools that I would like
to add to my electronics workbench. The first is made up of tools
that I will inevitably own one day. I just have to wait for the
right project to come up to justify the purchases. The second is a
wish list of things I will probably never justify or afford， such
as a spectrum analyzer， a hot air rework station，or a digital
oscilloscope. An LCR meter was firmly on the second list until I
decided to build one for the Microchip 16-bit Embedded Control 2007
Design Contest （see Photo 1）。 In this article， I‘ll describe my
design. As you'll see， you can use digital methods to measure the
frequency domain performance of passive components.
LCR METER
Why an LCR meter？ Over the last decade， digital multimeters have
become commodity items， constantly dropping in price to almost
implausible lows. However， there is little available for the
hobbyist to characterize component performance in the frequency
domain. For the most part，LCR meters have remained on the benches
of research and development laboratories. Sure， some multimeters
include a capacitance measurement function， but they use methods
that idealize the component， leading to very poor accuracies.
There were two uses for an LCR meter that motivated me to add it to
my wish list. First， I like to work with SMD components； however，
even when using relatively large 8050 package components， there are
no markings on chip capacitors， making identification impossible.
Second， switching power supplies are now used extensively.
Measuring inductor characteristics such as the quality factor （Q）
is critical to ensuring efficient voltage conversion. I am sure
that in addition to my initial needs， you will have many other uses
for this tool.
When I started the project， I wanted the LCR meter to be small，
portable，and battery-powered， much like a multimeter. I wanted to
be able to test across a number of common frequencies（100 Hz， 1
kHz， and 10 kHz） with a 1% basic accuracy. Finally， I wanted a
clear and modern interface to display the measurements to the user.
BACK TO BASICSExisting commercial LCR meters use a number of methods to establish
the real and complex components of AC impedance. Although measuring
the total impedance （Z） is relatively trivial， phase information is
more difficult to obtain accurately. My design makes simultaneous
measurements of the voltage and current and applies simple
trigonometric equations to recreate and compare the waveforms.
Figure 1 is a simplified depiction of how the measurements are
made. A sinusoidal waveform of a known frequency is buffered by an
op-amp and then applied to the device under test （DUT） via a source
resistance. Current flowing through the DUT is directed to the
inverting input of a second op-amp. The output voltage of the
op-amp ensures that the current flowing through the feedback
resistor is equal to that flowing through the DUT. That action
induces a voltage across the feedback resistor that is proportional
to the current flow through the DUT.
The current and voltage waveforms are sampled simultaneously. After
correcting any DC offset， the zero-crossing point is determined.
The crossing point is first estimated by using a linear regression
between points on either side of the crossing （see Figure 2）。
The maximum error of the method is set by the ratio of the test
frequency to the sample frequency. An area on either side of the
initial guess is iteratively evaluated by applying the formula：
The formula calculates the error between theoretical and measured
values of points a0 and a1. The width of the search area is
determined by the error due to the initial guess. The step size
applied to the previous equation determines the improved error. The
point representing the minimum error is the zero-crossing point.
Using this zero-crossing point， the waveform amplitude can be
calculated based on the value of any measured point and its
position in time relative to the crossing. In practice， several
points are evaluated and the results are averaged. Because
measurements are made simultaneously， the relative phase between
waveforms is easily evaluated.
There is an important caveat regarding the use of the described
method： it is totally reliant on the data being a pure sinusoid.
Therefore， the applied test waveform must be a high-quality
sinusoidal source and the acquired data must not include any other
frequency components. Both issues are addressed with digital
methods. First， the waveform is accurately constructed using direct
digital synthesis （DDS） technology. Second， the acquired data is
bandlimited using digital signal processing（DSP） filters.
THE BIG PICTURE
Figure 3 shows the main parts of the system. The core device is a
Microchip Technology dsPIC30F4012 microprocessor，whose system clock
is derived from an external 6-MHz crystal feeding an internal 16×
PLL， resulting in 24-MIPS operation （see Figure 4）。
The oscillator frequency was chosen to allow ADC sample rates that
were exact multiples of the test frequency.
The analog measurement block and a user interface block support the
core microprocessor. Extensive use of the SPI port was made to
maximize functionality from the 28-pin dsPIC device. For example，
the LCD‘s 8-bit parallel port is controlled by a Microchip
Technology MCP23S08 SPI GPIO. The analog block also consists of
several SPI devices， including two Microchip Technology MCP6S91
PGAs， an Analog Devices AD9833 DDS signal generator， and a
Microchip Technology MCP41010 10-kΩ digital potentiometer. The chip
select （CS） signal between the digital potentiometer and the GPIO
were able to be shared due to the instruction set bit
masking，further reducing the required pins. User input requires
only a single pin because control buttons are interfaced to the ADC
with a resistor ladder.
The prototype system was built around Microchip‘s 16-bit 28-pin
development board. I also built three other boards （see Photo 1）。
One board carries the user interface， which consists of a graphic
LCD and control buttons. Another custom-etched board contains the
analog measurement components. The antialiasing filters are
constructed on a separate protoboard. Jumper wires connect the
boards.
The DUT is connected via a set of test leads to the analog board.
The prototype used RCA connectors between the four-wire test leads.
The PCB cable shielding is connected to the analog ground plane by
a pair of screw terminals. RCA plugs were used because they are
inexpensive and perform well at the test frequencies. In the final
design， four separate RCA plugs will be employed， each with their
shield connected to the outer terminal to enable better noise
immunity. The DUT is connected via a pair of parrot clips， which
enable handsfree use for axial components. A tweezer test lead will
be made for SMD parts.
CREATING A WAVECreating the sinusoidal test signal easily could have been the most
difficult part of this project. Luckily， I found an effective
solution in the form of an AD9833 DDS signal generator chip. The
device runs as a SPI slave whose 10-bit DAC outputs a square，
triangle， or sine wave based on an internal 28-bit
frequency-setting register and an external clock signal.
A DDS chip enables the creation of waveforms over a wide frequency
range with low distortion and requires no additional filtering. The
master clock signal for the DDS chip was created from the
dsPIC30F4012 PWM port. The clock frequency was set at 1 MHz to
deliver both good frequency resolutions from the 28-bit control
register and minimize noise transfer to the measurement‘s
frequencies.
ANALOG STAGES
For this project to be effective， I had to get heavily involved in
the black art of analog design. The nature of this device requires
high accuracy and low noise amplification over a wide range of
gains. Because considerable amplification is required for devices
at either extreme of the impedance spectrum，input offset and other
errors can easily saturate op-amp outputs. With this in mind， the
bipolar sections of the analog circuit were handled via Analog
Devices AD8629 zero-drift op-amps whose 1-μV offset and 0.002-μV/°C
drift are orders of magnitude below the expected signal range.
The task of the first analog stage is to condition the test signal.
The signal from the DDS chip is approximately 0.3 VPP， and its
common mode voltage（CMV） is approximately 0.3 V. The signal is fed
through a single-order， lowpass RC filter to further isolate clock
noise. From there， it is directed to the inverting input of an
AD8629 op-amp. The op-amp is configured to generate a nominal 1-VPP
signal with 0-V CMV. The required offset is achieved via a voltage
present on the non-inverting input that is adjusted by the MCP41010
10-kΩ digital potentiometer.
The resultant signal from the first stage is fed via a 1-kΩ 0.1%
source resistor to the DUT. A four-wire Kelvin clip test lead is
used to minimize the effects of the lead resistance. The test
signal passes through the DUT and into the inverting input of a
ground-referenced AD8629 op-amp. The current flowing through the
device is then imposed as a voltage across the 1-kΩ 0.1% feedback
resistor.
The differential signals for voltage and current are directed to
separate differential instrumentation-style amplifiers constructed
of three AD8629 op-amp sections each. The gain for this stage is
selectable via a Vishay Intertechnology DG418L analog switch，
resulting in either G = 2 or G = 128. The final op-amp in this
differential configuration is referenced at 2.5 V-provided by a
Microchip Technology MCP1525 precision voltage reference and
buffered by a Microchip Technology MCP6022 op-amp-to minimize
source impedance.
The op-amp stages need lead compensation by way of a
smallcapacitance（47 pF paralleled with the feedback resistor）。 This
was necessary to ensure stability，especially for stages with
minimal gain. The capacitor value was carefully chosen to not
attenuate the test frequency.
The previous stage output is centered on 2.5 V but still requires
additional gain for impedances greater or smaller than the source
resistance. The signal is amplified in binary steps（e.g.， 2， 4， 8，
16， and 32） by a Microchip MCP6S91 SPI PGA. The reference pin for
this op-amp is tied to the same 2.5-V reference voltage as the
previous stage.
The non-ideal realization of the design is caused by the
highfrequency impedance of the DG418L analog switch， a quantity not
covered in the specification sheet. At 10 kHz， the switch displays
approximately 3-dB attenuation and also introduces additional phase
shift. Both have to be compensated for. A more suitable component
with a higher cut-off frequency will be substituted in future
revisions.
SIGNAL CONDITIONING
The flow of signal conditioning stages is illustrated for each
test frequency in Figure 5. Before being sampled by the dsPIC ADC，
each signal is passed through an LP antialiasing filter to ensure
that the Nyquist-Shannon sampling theorem criterion is met. In this
case， the sample rate （Fs） is 100 kHz and the ADC is 10
bits；therefore， the filter needs to reduce the signal strength by
approximately 61 dB between 10 kHz （highest frequency of interest）
and 50 kHz （Fs/2）。This task was achieved by a sixthorder
Butterworth filter. Microchip‘s free FilterLab 2.0 was used to
design this filter and generate the passive component values.
Once the signal has been suitably band-limited， it is digitized by
the 10-bit ADC. The next action is dependent on the test frequency.
In the case of a 10-kHz test， the signal is passed directly to an
IIR band-pass filter that limits the bandwidth to only the
frequency of interest. In the case of the 1-kHz and 100-Hz tests，
the signal must first be low-pass， FIR-filtered，and decimated. The
rate of decimation is dependent on the test frequency，either at a
rate of eight or 16. Decimation is required in this system at lower
test frequencies to minimize the size of data needed to represent a
single test cycle. It allows compliance with Nyquist criterion
while only relying on a single antialiasing filter.
USER INTERFACEYou interact with the device via three control buttons. You receive
information via a 128 × 64 pixel graphic LCD using a Toshiba T6963C
chipset. The eight data lines are driven via an MCP23S08 SPI GPIO.
The RD signal is supplied as an inversion of the WR signal via a
general-purpose NPN transistor rather than using an additional GPIO
line. The two remaining control lines， CE and C/D， are driven
directly from general I/O pins.
The screen contrast is controlled by a connection to a PWM pin
clocked at 1 MHz （required for DDS operation）。Currently， the
contrast is not useradjustable，although this functionality will be
added in a later revision. Similarly，backlighting control is not
implemented in the prototype. This is required to improve battery
life.
FIRMWARE
I wrote the system‘s code in C and compiled it with the contest
version of Microchip's C30 compiler. Code was developed as many
individual functions，which could be tested in isolation. Developing
the code in small pieces was necessary because the programming tool
I used （PICkit 2） did not support the debugging of dsPIC devices.
Coefficients for the DSP filters were designed using Momentum Data
Systems‘s dsPIC FD Lite. The resulting assembly files from this
program have to be slightly modified to suit versions of MPLAB C30
v1.30 and higher because the standard declarations used are no
longer allowed by the compiler.
Before using a digital filter on a small data sample， its delay
line has to be set appropriately. Because the initial value of the
acquired dataset could lie anywhere within the sinusoid，there is a
chance the data could appear to the filter as a step input，which
would cause ringing throughout the dataset. The process of setting
the delay line involves running a set of data whose length is an
exact multiple of the period many times through the filter and
ignoring the resulting output data.
Setting the delay line for IIR filters in this way doesn't present
problems；however， the actual frequency of the"100-Hz" test was
adjusted to 100.80635 Hz to present an exact sinusoid period with
an integer-sized data set. The FIR filters used for down-sampling
cannot use recorded data because there is a strict requirement on
the cycles between ADC buffer flags. Instead， the initial 50 cycles
of the filter use fresh data to set up the delay line and then only
the last few frames are stored for further analysis.
I used FastAVR‘s FastLCD V1.2.0 to create the graphics displayed on
the LCD （see Photo 2）。The free program enables you to quickly
create and preview graphics before exporting them as a text file in
a number of formats，including one suitable for the Toshiba chipset.
Graphics were stored in program memory as constants， representing a
sizable amount of data.
TAKE A MEASUREMENTFigure 6 illustrates a simplified program flow for the function
call that performs each test. The first tasks involve setting the
ADC module， setting the DDS chip for the desired frequency，and
setting the gain for both channels to a minimum value. The function
of the initial acquisition loop is to auto-range the gain for each
channel. Following offset correction and bandpass filtering， the
dataset is scanned for the maximum value. If it's below a preset
threshold， the gain is increased（doubled） and the acquisition
starts again. This process is continued until either a suitable
gain is found or the maximum gain is reached.
The second loop within the test function acquires data in a similar
way to the previous loop， correcting the offset and filtering the
resulting array. The main difference is that additional code is
executed to calculate the crossing point and from this the
impedance and phase angle. The number of times the loop executes is
dependent on the argument passed to the function.
Calculations of the parameters other than impedance and phase angle
are made within RUN_TEST（）。 This calculation is dependent on the
circuit model under consideration. Auto mode attempts to first
check if the Parallel mode is suitable （small
capacitance）；otherwise， the series model is used. The resulting
parameter values are recorded to a global structure. A call to
functions within the graphics module displays the values within
this structure. It also displays the circuit elements graphically.
SYSTEM PERFORMANCEThe prototype system‘s performance is very pleasing. The user
interface is easy to use， push button operation is handy，and the
graphic LCD is clear and easy to read. Measurements appear to meet
the required accuracy （less than 1%）， and repeatability is
excellent. Because the system can automatically choose the most
suitable frequency and circuit type，making basic measurements is
very easy.
Currently， the program implements a five-cycle averaging function
on the result to improve stability and accuracy. While this is a
useful function， it has the disadvantage of increasing the overall
test cycle time. A test on"automatic" will take up to 5 s to
finish. A fast test feature is needed in the next prototype to
enable quick sorting of parts at a lower accuracy.
Typically， LCR meters implement short-circuit and open-circuit
calibration. Tests on this device have shown that use of the
four-wire method has resulted in a series resistance error that is
significantly less than the lowerlimit impedance that can be
measured. Open-circuit tests， however， have shown that there is
approximately 3.5 pF of parallel capacitance in the test leads. At
frequencies below 10 kHz， this capacitance represents an impedance
value significantly above the measurement ceiling. Future revisions
of this design will add a calibration cycle to measure and
compensate for the parallel capacitance.
FURTHER DEVELOPMENT
To correctly measure the impedance，or more importantly the
equivalent series resistance （ESR） of electrolytic capacitors， a
DC-bias voltage must be applied. I'll add this to the next
prototype as a fixed （e.g.， 2 V） bias that is isolated from the
measurement equipment by small-value DC-blocking capacitors.
Input overload protection is another feature that is especially
important for large electrolytic capacitors. It is easy to add to
the design. When the DUT is connected， stored energy in the device
will discharge into the measurement circuit. Effective protection
can be provided by varistors or Zeners coupled with forward-biased
diodes.
The final version of this project will be incorporated into a
multimeterstyle enclosure. It will include battery power for
portable use.
WHAT‘S NEXT？This project was my first implementation of embedded DSP
technology. It was also my first introduction to Microchip‘s 16-bit
processors. The toolchain and development tools supplied by
Microchip made coding this type of controller quick and painless.
The compiler was easy to use and all of the library files were
well-documented.
I'm pleased that I can now cross the LCR meter off of my wish list.
In addition，while adding a new and valuable tool to my workbench， I
have learned a great deal about both analog and digital design. Now
I look at the remaining items on my wish list and wonder which tool
I should attack next. Perhaps a dsPIC spectrum analyzer！
Editor‘s note： To learn about the other projects that placed in the
Microchip 16-Bit Embedded Control 2007 Design Contest， visit www.circuitcellar.com/microchip2007/.
Author‘s note： I want to express my gratitude to Circuit Cellar and
Microchip Technology for running the Microchip 16-Bit Embedded
Control Design Contest. It was a fantastic experience.
Miguel Rusch lives in Melbourne，Australia， with his wife Katherine.
He earned a Bachelor of Engineering（Mech） degree from Monash
University in 2004. Currently， Miguel is working in the automotive
industry，where he has several years of design experience. One day
he hopes to convert his all-consuming electronics hobby into a real
job in the embedded arena. You can contact Miguel at miguel@migdevelopments.com.
PROJECT FILES
To download code and additional files,go to
ftp://ftp.circuitcellar.com/pub/Circuit_Cellar/2008/214.
RESOURCES
Agilent Technologies, Inc., "Impedance Measurement Handbook," 2006,
http://cp.literature.agilent.com/litweb/pdf/5950-3000.pdf.
Analog Devices, Inc., "A Technical Tutorial on Digital Signal
Synthesis,"1999, www.analog.com/UploadedFiles/Tutorials/450968421DDS_Tutorial_rev12-2-99.pdf.
Hitachi, "Application Note AN-029:Interfacing and set-up of Toshiba
T6963C," 2004, www.hitachi-displayseu.com/doc/AN-029_Interfacing_and_set-up_for_Toshiba_T6963C.pdf.
K. Lacanette, "Application Note 779:A Basic Introduction to
Filters-Active, Passive, and Switched-Capacitor,"National
Semiconductor, Corp.,1991,
www.national.com/an/AN/AN-779.pdf.
Texas Instruments, Inc., "Stability Analysis of Voltage Feedback
Op-Amps Including Compensation Techniques Application Report,"
SLOA020A, 2001,
http://focus.ti.com/lit/an/sloa020a/sloa020a.pdf.
SOURCES
AD8629 Op-amp and AD9833 waveform generator Analog Devices, Inc.
www.analog.com
FastLCD V1.2.0
FastAVR
www.fastavr.com
dsPIC30F4012 Microprocessor, Filter-Lab 2.0, MCP23S08 SPI, MCP41010
dGPIO, MCP6022 op-amp, MCP6S91 PGA, MPLAB C30 compiler, and PICkit
2 programmer Microchip Technology, Inc.
www.microchip.com
dsPIC FD Lite
Momentum Data Systems, Inc.
www.mds.com
T6963C Chipset
Toshiba America, Inc.
www.toshiba.com
DG418L Analog switch
Vishay Intertechnology, Inc.
www.vishay.com
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