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Jitter Measurements—Why Are
They So Important?
Edge jitter in serial devices is a growing concern for designers and developers. Jitter matters. It affects system performance. It is difficult to trace and characterize. And jitter limits must be met in order to comply with industry standards such as PCI Express and Fibre Channel.
At the heart of the jitter measurement discipline, there is an understanding that jitter is the “canary in the coal mine1”—an advance indicator that warns of unacceptable BER performance to come. Jitter causes eye diagram openings to shrink, in turn causing receiving elements to make incorrect decisions about the state of incoming data bits and packets.
And jitter issues aren’t restricted to the serial data path alone. Jitter affects timekeeping elements—clocks—as well. This too can spawn incorrect data decisions, since a misplaced clock edge can cause a data bit’s state to be read too early or too late.
These are the realities of jitter. And the whole problem is compounded with each successive increase in data and clock rates. Serial bus data rates are advancing well into the multi-gigahertz range, narrowing the tolerance for any kind of timing errors. Today, measurement vendors as well as serial bus designers are investing substantial resources into research about jitter behavior. The result is
a broader understanding of jitter’s constituent parts and its impact on system performance. New approaches to jitter measurement are giving engineers more insight into their designs and better tools to confront the causes and effects of jitter.
This technical brief is aimed at designers, researchers,engineers, and technicians working with serial data communication architectures of all kinds. For these individuals,understanding and measuring jitter is the surest path toward solving BER problems at the system level.
This document will explain some essential jitter terms,and then go on to discuss jitter measurements and the tools best suited for evaluating and quantifying jitter.
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They So Important?
Edge jitter in serial devices is a growing concern for designers and developers. Jitter matters. It affects system performance. It is difficult to trace and characterize. And jitter limits must be met in order to comply with industry standards such as PCI Express and Fibre Channel.
At the heart of the jitter measurement discipline, there is an understanding that jitter is the “canary in the coal mine1”—an advance indicator that warns of unacceptable BER performance to come. Jitter causes eye diagram openings to shrink, in turn causing receiving elements to make incorrect decisions about the state of incoming data bits and packets.
And jitter issues aren’t restricted to the serial data path alone. Jitter affects timekeeping elements—clocks—as well. This too can spawn incorrect data decisions, since a misplaced clock edge can cause a data bit’s state to be read too early or too late.
These are the realities of jitter. And the whole problem is compounded with each successive increase in data and clock rates. Serial bus data rates are advancing well into the multi-gigahertz range, narrowing the tolerance for any kind of timing errors. Today, measurement vendors as well as serial bus designers are investing substantial resources into research about jitter behavior. The result is
a broader understanding of jitter’s constituent parts and its impact on system performance. New approaches to jitter measurement are giving engineers more insight into their designs and better tools to confront the causes and effects of jitter.
This technical brief is aimed at designers, researchers,engineers, and technicians working with serial data communication architectures of all kinds. For these individuals,understanding and measuring jitter is the surest path toward solving BER problems at the system level.
This document will explain some essential jitter terms,and then go on to discuss jitter measurements and the tools best suited for evaluating and quantifying jitter.
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