基于FPGA的数值运算的更高基表示的浮点表示

High Radix Floating-Point Representation for FPGA-Based Arithmetic

摘要：FPGA实现浮点操作数，通常使用二进制浮点表示法，这种方法已经有30年之久。 二机制表示能够最大化每个FPGA资源单元的精度。 本文讨论更高的基表示方法用于基于FPGA的计算，尤其是高精度的计算。 使用更高的基表示，能够带来更高的资源使用效率，例如，16进制的表示浮点加法，带来30%的更小的areatiem，带来同等的最差性能，更优的平均性能。

FPGA implementations of floating-point operators have

historically been designed to use binary floating-point representations.

The general computing world settled on binary

floating-point representations over three decades ago,

and more recently, the FPGA community followed their example.

Binary representations were chosen to maximize numerical

accuracy per bit of data, however, the unique nature

of FPGA-based computation makes numerical accuracy per

unit of FPGA resources a more important measure of the

usefulness of a given floating-point representation. In this

paper, we show that higher radix floating-point representations

are well suited to FPGA-based computations, especially

high precision calculations which require the support

of denormalized numbers. Higher radix representations

use FPGA resources more efficiently. For example, a

hexadecimal floating-point adder has a 30% smaller areatime

product than its binary counterpart, while still delivering

equal worst-case and better average-case numerical accuracy.

Contrary to established belief, higher radix representations

are useful for FPGA applications requiring IEEE

754 compliance, since they can deliver superior numerical

performance while still using less FPGA resources.