Recorded Lecture: System Generator Getting Started Training
Duration: Each module is approximately 5 to 6 mins.
System Generator enables the use of Simulink for designing Xilinx
FPGAs. This recorded e-learning training will provide a jump start
for those who want to evaluate this flow.
After completing this training, you will be able to:
- Create a DSP design that includes memories and control using
Simulink and implement that design into a Xilinx FPGA
使用Simulink设计包含存储和控制的DSP设计，并且在XilinxFPGA中实现
- Design highly efficient FIR filters for the Xilinx device
architectures
基于Xilinx的架构，设计高效的FIR滤波器
- Define fixed-point numeric precision abstractly using the Xilinx
DSP blockset
使用XilinxDSP的blockset，定义定点数值运算的精度
Module Descriptions
- Module 1 - Introduction to System Generator: Provides a high-level
overview of the System Generator features and capabilities.
入门：System
Generator的features和capabilities
- Module 2 - Design Creation Basics: Introduces the basics of
creating and implementing a DSP design using System Generator.
使用System
Generator来创建和实现DSP设计
- Module 3 - Signal Routing: Covers the use of the System Generator
routing blocks for extracting and manipulating the individual bits
of a fixed-point signal.
信号布线:
- Module 4 - Implementing System Control: Covers the preferred
methods for using System Generator to create finite state machines,
logical control conditions, and the handling of bursty data typical
of FFT and filtering operations.
使用System
Generator产生有限状态机、逻辑控制、FFT和滤波器操作的bursty data操作
- Module 5 - Multi-Rate Systems: Shows the proper way to create
multi-rate systems using upsampling and downsampling of data.
多速率系统：对数据upsampling 和
downsampling
- Module 6 - Memories: Covers proper usage of the Xilinx block RAM
resources and the DSP blocks available for building DSP designs
targeting Xilinx RAMs.
合理使用Xilinx block RAM
- Module 7 - Filter Design: Discusses methods for creating efficient
FIR filters in the Xilinx devices, use of the FIR Compiler block
for filter implementation, and use of the FDATool for filter
design.
使用FIR
Compiler模块实现FIR滤波器；FDATool来设计滤波器
View the Lectures
Viewing these recorded e-learning modules requires a Xilinx
Education Services user account.
Note that your Xilinx Education Services user account is not the same as your MySupport user account or any other account on the Xilinx.com Website. You do not have an
active student account unless you have logged in to the Education
Services Training Catalog since December of 2004.
Do you have a Xilinx Education Services user account?
No, I do not have a Xilinx Education Services user account:
- Click the "New User?" link from the Training Catalog
- After creating a user account, you will be taken to a page where
you can launch the recorded module
Yes, I have a Xilinx Education Services user account:
- Log in directly from the Training Catalog
- After logging in, you will be taken to a page where you can launch
the recorded module
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