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XPS中调入chipscope的icon和ila核出现error

版主: Jerry Fan  玄剑  jennyzheng  XUPteam 
XPS中调入chipscope的icon和ila核出现error
 

大家好

   我的edk和chipscpe都是9.1版本的,当调入chipscope的icon和ila核时,设置一下参数后,出现一些错误:

ERROR:MDT - chipscope_icon_0 (chipscope_icon) - Generating the core :
   chipscope_icon_0....
   Chipscope Core Generator Error :

   ChipScope Pro Core Generator
     Version : 9.1.01i
     Build   : 09101.7.12.910


   Reading arguments from file
   E:/my_project/test_microblaze3/implementation/cs_coregen_chipscope_icon_0.arg
   Warning: Arguments from file will override command line arguments

   Creating EDIF Netlist
   E:\my_project\test_microblaze3/implementation/chipscope_icon_0_wrapper/\icon_
   1.edn
   Component Name: icon_1
   Device Family: Virtex2P
   Control port count: 1
   Enable BSCAN instance: false
   BSCAN chain: USER1
   Enable JTAG global clock buffer: true
   Enable unused BSCAN ports: false
   Force RPM Grid Usage: no
   Resource Utilization Estimate   LUT:97    FF:28    BRAM:0

   Warning: EDIF Netlist being generated

   Post Processing EDIF netlist
   E:\my_project\test_microblaze3/implementation/chipscope_icon_0_wrapper/\icon_
   1.edn

   Generating constraints file
   E:\my_project\test_microblaze3\implementation\chipscope_icon_0_wrapper\icon_1
   .ncf
   WARNING: Default charset GBK not supported, using ISO-8859-1 instead

   Please verify that the MHS Parameters for "chipscope_icon_0" core are valid
   and the generated Chipscope Core Generator arg file :
   "implementation/cs_coregen_chipscope_icon_0.arg" is valid
   *************************************************************
       while executing
   "error "Generating the core : $params(INSTANCE)....
   Chipscope Core Generator Error :
   $err

   Please verify that the MHS Parameters for \"$params(INSTANC..."
       (procedure "::hw_chipscope_icon_v1_01_a::icon_generate" line 91)
       invoked from within
   "::hw_chipscope_icon_v1_01_a::icon_generate 39474328"
**********************************************
**********************************************
**********************************************
**********************************************
Param values are : INSTANCE chipscope_ila_0 HW_VER 1.01.a C_FAMILY virtex2p C_DEVICE 2vp30 C_PACKAGE ff896 C_SPEEDGRADE -7 C_NUM_DATA_SAMPLES 512 C_ENABLE_TRIGGER_OUT 1 C_DATA_SAME_AS_TRIGGER 1 C_DATA_IN_WIDTH 32 C_DISABLE_RPM 0 C_DISABLE_SRL16S 0 C_RISING_CLOCK_EDGE 1 C_ENABLE_TRIGGER_SEQUENCER 1 C_MAX_SEQUENCER_LEVELS 16 C_ENABLE_STORAGE_QUALIFICATION 1 C_TRIG0_UNITS 1 C_TRIG0_TRIGGER_IN_WIDTH 1 C_TRIG0_UNIT_COUNTER_WIDTH 0 C_TRIG0_UNIT_MATCH_TYPE basic C_TRIG1_UNITS 0 C_TRIG1_TRIGGER_IN_WIDTH
8 C_TRIG1_UNIT_COUNTER_WIDTH 0 C_TRIG1_UNIT_MATCH_TYPE basic C_TRIG2_UNITS 0 C_TRIG2_TRIGGER_IN_WIDTH 8 C_TRIG2_UNIT_COUNTER_WIDTH 0 C_TRIG2_UNIT_MATCH_TYPE basic C_TRIG3_UNITS 0 C_TRIG3_TRIGGER_IN_WIDTH 8 C_TRIG3_UNIT_COUNTER_WIDTH 0 C_TRIG3_UNIT_MATCH_TYPE basic C_TRIG4_UNITS 0 C_TRIG4_TRIGGER_IN_WIDTH 8 C_TRIG4_UNIT_COUNTER_WIDTH 0 C_TRIG4_UNIT_MATCH_TYPE basic C_TRIG5_UNITS 0 C_TRIG5_TRIGGER_IN_WIDTH 8 C_TRIG5_UNIT_COUNTER_WIDTH 0 C_TRIG5_UNIT_MATCH_TYPE basic C_TRIG6_UNITS 0 C_TRIG6_TRIGGER_
IN_WIDTH 8 C_TRIG6_UNIT_COUNTER_WIDTH 0 C_TRIG6_UNIT_MATCH_TYPE basic C_TRIG7_UNITS 0 C_TRIG7_TRIGGER_IN_WIDTH 8 C_TRIG7_UNIT_COUNTER_WIDTH 0 C_TRIG7_UNIT_MATCH_TYPE basic C_TRIG8_UNITS 0 C_TRIG8_TRIGGER_IN_WIDTH 8 C_TRIG8_UNIT_COUNTER_WIDTH 0 C_TRIG8_UNIT_MATCH_TYPE basic C_TRIG9_UNITS 0 C_TRIG9_TRIGGER_IN_WIDTH 8 C_TRIG9_UNIT_COUNTER_WIDTH 0 C_TRIG9_UNIT_MATCH_TYPE basic C_TRIG10_UNITS 0 C_TRIG10_TRIGGER_IN_WIDTH 8 C_TRIG10_UNIT_COUNTER_WIDTH 0 C_TRIG10_UNIT_MATCH_TYPE basic C_TRIG11_UNITS 0 C_
TRIG11_TRIGGER_IN_WIDTH 8 C_TRIG11_UNIT_COUNTER_WIDTH 0 C_TRIG11_UNIT_MATCH_TYPE basic C_TRIG12_UNITS 0 C_TRIG12_TRIGGER_IN_WIDTH 8 C_TRIG12_UNIT_COUNTER_WIDTH 0 C_TRIG12_UNIT_MATCH_TYPE basic C_TRIG13_UNITS 0 C_TRIG13_TRIGGER_IN_WIDTH 8 C_TRIG13_UNIT_COUNTER_WIDTH 0 C_TRIG13_UNIT_MATCH_TYPE basic C_TRIG14_UNITS 0 C_TRIG14_TRIGGER_IN_WIDTH 8 C_TRIG14_UNIT_COUNTER_WIDTH 0 C_TRIG14_UNIT_MATCH_TYPE basic C_TRIG15_UNITS 0 C_TRIG15_TRIGGER_IN_WIDTH 8 C_TRIG15_UNIT_COUNTER_WIDTH 0 C_TRIG15_UNIT_MATCH_T
YPE basic IPNAME chipscope_ila
Created elaborate directory hdl/cs_edk_port_mapper/

ERROR:MDT - chipscope_ila_0 (chipscope_ila) -
                      Generating the Chipscope core :
   cs_coregen_chipscope_ila_0....
                      Chipscope Core Generator Error :

   ChipScope Pro Core Generator
     Version : 9.1.01i
     Build   : 09101.7.12.910


   Reading arguments from file
   E:/my_project/test_microblaze3/implementation/cs_coregen_chipscope_ila_0.arg
   Warning: Arguments from file will override command line arguments

   Creating EDIF
   NetlistE:\my_project\test_microblaze3/implementation/chipscope_ila_0_wrapper/
   \cs_coregen_chipscope_ila_0.edn
   Component Name: cs_coregen_chipscope_ila_0
   Manufacturer ID: 1
   Core Type: 2
   Core Version: v9.1.1
   Device Family: Virtex2P
   SRL16 Type: SRLC16/E
   RAM Type: 16384-bit block RAM
   Clock Edge Used for Sampling: rising edge
   RPM Usage: enabled
   Trigger Output Port: enabled
   Storage Qualification: enabled
   Data Same as Trigger: true
     Data port is made up of the following trigger ports:
       Trigger Port 0
   Aggregate Data Width: 1
   Data Depth: 512
   Enable Gap Recording: false
   Enable Timestamp Recording: false
   Number of Trigger Ports: 1
     Trigger Port 0 Width:1
   Number of Match Units: 1
     Match Unit 0 Info:
       Connection: Trigger Port 0
       Type: Basic
       Match Counter : disabled
   Trigger Sequencer Type : Basic
     Number of trigger sequencer levels: 16
   External capture : disabled
   Force RPM Grid Usage: no
   Resource Utilization Estimate   LUT:219    FF:173    BRAM:1

   Warning: EDIF Netlist being generated

   Post Processing EDIF netlist
   E:\my_project\test_microblaze3/implementation/chipscope_ila_0_wrapper/\cs_cor
   egen_chipscope_ila_0.edn

   Generating constraints file
   E:\my_project\test_microblaze3\implementation\chipscope_ila_0_wrapper\cs_core
   gen_chipscope_ila_0.ncf

   Generating CDC file
   E:\my_project\test_microblaze3\implementation\chipscope_ila_0_wrapper\cs_core
   gen_chipscope_ila_0.cdc
   WARNING: Default charset GBK not supported, using ISO-8859-1 instead

                      Please verify that the MHS Parameters for
   "chipscope_ila_0" core are valid
                      and the generated Chipscope Core Generator arg file :
   "implementation/cs_coregen_chipscope_ila_0.arg" is valid
   *************************************************************
       while executing
   "error "
                      Generating the Chipscope core :
   cs_coregen_$params(INSTANCE)....
                      Chipscope Core Generator Error :
        ..."
       (procedure "::hw_chipscope_ila_v1_01_a::ila_generate" line 117)
       invoked from within
   "::hw_chipscope_ila_v1_01_a::ila_generate 39476888"
ERROR:MDT - platgen failed with errors!

ERROR:MDT - chipscope_icon_0 (chipscope_icon) - Generating the core :
   chipscope_icon_0....
   Chipscope Core Generator Error :

   ChipScope Pro Core Generator
     Version : 9.1.01i
     Build   : 09101.7.12.910


   Reading arguments from file
   E:/my_project/test_microblaze3/implementation/cs_coregen_chipscope_icon_0.arg
   Warning: Arguments from file will override command line arguments

   Creating EDIF Netlist
   E:\my_project\test_microblaze3/implementation/chipscope_icon_0_wrapper/\icon_
   1.edn
   Component Name: icon_1
   Device Family: Virtex2P
   Control port count: 1
   Enable BSCAN instance: false
   BSCAN chain: USER1
   Enable JTAG global clock buffer: true
   Enable unused BSCAN ports: false
   Force RPM Grid Usage: no
   Resource Utilization Estimate   LUT:97    FF:28    BRAM:0

   Warning: EDIF Netlist being generated

   Post Processing EDIF netlist
   E:\my_project\test_microblaze3/implementation/chipscope_icon_0_wrapper/\icon_
   1.edn

   Generating constraints file
   E:\my_project\test_microblaze3\implementation\chipscope_icon_0_wrapper\icon_1
   .ncf
   WARNING: Default charset GBK not supported, using ISO-8859-1 instead

   Please verify that the MHS Parameters for "chipscope_icon_0" core are valid
   and the generated Chipscope Core Generator arg file :
   "implementation/cs_coregen_chipscope_icon_0.arg" is valid
   *************************************************************
       while executing
   "error "Generating the core : $params(INSTANCE)....
   Chipscope Core Generator Error :
   $err

   Please verify that the MHS Parameters for \"$params(INSTANC..."
       (procedure "::hw_chipscope_icon_v1_01_a::icon_generate" line 91)
       invoked from within
   "::hw_chipscope_icon_v1_01_a::icon_generate 39474328"

 

不知道是什么原因,请大家给看看啊

谢谢了

于2009-10-25 07:46前回复此主题可获赠1积分。
 
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RE:XPS中调入chipscope的icon和ila核出现error
 
升级ISE为最新版本,下载地址为:
http://www.xilinx.com/support/download/i91winsp.htm
升级IP核,下载地址为:
http://www.xilinx.com/support/download/i91solip.htm
确认EDK是否升级到了最新的版本,下载地址为:
http://www.xilinx.com/support/download/i91winedk.htm
升级Chipscope到9.1.3应该就可以解决了,下载地址为:
http://www.xilinx.com/support/download/i91wincs.htm
如果还不行,就继续提问。
 
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