晕啊，用cw7.2试了下，问题依旧。
我怀疑是不是link文件有问题。下面是.lcf文件，贴出来请大家帮我看看（注：这个文件原先是mcf52259evb
bsp下的，我直接考过来，改了下，因为我的板子上没有MRAM，只有 外扩的SRAM，其他没做任何改动）
MEMORY
{
## external sram (RW): ORIGIN =
0x80000000, LENGTH = 0x0002000 # SRAM is not used for linking
## sram (RW): ORIGIN = 0x20000000,
LENGTH = 0x00010000
vectorrom (RX): ORIGIN = 0x00000000, LENGTH =
0x00000400
cfmprotrom (RX): ORIGIN = 0x00000400, LENGTH =
0x00000020
rom (RX): ORIGIN =
0x00000420, LENGTH = 0x0007FBE0 # Code + Const data
## flashx (RW): ORIGIN = 0x00000420,
LENGTH = 0x0007FBE0 # Internal flash
ram (RW): ORIGIN =
0x20000000, LENGTH = 0x00010000 # SRAM - RW data
# kernel space starts after RAM variables (Location of
MQX Kernel data + MQX heap)
end_of_kd (RW): ORIGIN = 0x2000FFF0, LENGTH =
0x00000000
# Boot stack reused by MQX Kernel data
bstack (RW): ORIGIN = 0x2000FA00,
LENGTH = 0x00000200 # Boot stack
end_bstack (RW): ORIGIN = 0x2000FBFF, LENGTH =
0x00000000
}
KEEP_SECTION { .vectors_rom, .vectors_ram, .cfmconfig }
SECTIONS
{
___INTERNAL_SRAM_BASE = 0x20000000;
___INTERNAL_SRAM_SIZE = 0x00010000;
___INTERNAL_FLASH_BASE = 0x00000000;
___INTERNAL_FLASH_SIZE = 0x00080000;
___EXTERNAL_SRAM_BASE = 0x80000000;
___EXTERNAL_SRAM_SIZE = 0x00020000;
___EXTERNAL_SRAM_ROM_BASE = 0x80000000;
___EXTERNAL_SRAM_ROM_SIZE = 0x00010000;
___EXTERNAL_SRAM_RAM_BASE = 0x80010000;
___EXTERNAL_SRAM_RAM_SIZE = 0x00010000;
___IPSBAR
= 0x40000000; # Peripherals/FlexCAN
___VECTOR_TABLE_START = 0x20000000; #
Runtime vector table in sram
# MQX link time configurations
___DEFAULT_PROCESSOR_NUMBER = 1;
___DEFAULT_INTERRUPT_STACK_SIZE = 1024;
___KERNEL_DATA_VERIFY_ENABLE = 0; #
Test SDRAM read/write
# Flashx configurations
___FLASHX_SECT_SIZE = 0x1000;
.vectors :
{
___VECTOR_TABLE_ROM_START = .; #
Runtime vector table in sram
*(.vectors_rom)
. = ALIGN (0x4);
} > vectorrom
.cfmprotect :
{
*(.cfmconfig)
. = ALIGN (0x4);
} > cfmprotrom
.main_application :
{
*(KERNEL)
*(S_BOOT)
*(IPSUM)
*(.text)
*(.init)
*(.fini)
*(.eini)
*(.ctors)
*(.dtors)
.= ALIGN(0x4);
*(.rodata)
.= ALIGN(0x4);
*(.rdata)
. = ALIGN(0x4);
*(.exception)
. = ALIGN(0x4);
__exception_table_start__ = .;
EXCEPTION
__exception_table_end__ = .;
___sinit__ = .;
STATICINIT
.= ALIGN(0x4);
__COPY_OF_DATA = .;
} > rom
.main_application_data : AT(__COPY_OF_DATA)
{
. = ALIGN(0x10000);
___VECTOR_TABLE_RAM_START = .; #
Runtime vector table in sram
*(.vectors_ram)
. = ALIGN(512);
__BDT_BASE = .;
*(.usb_bdt)
__BDT_END = .;
__START_DATA = .;
*(.data)
__END_DATA = .;
. = ALIGN(0x4);
__START_SDATA = .;
*(.sdata)
__END_SDATA = .;
. = ALIGN(0x4);
__SDA_BASE = .;
__SDA_BASE_ = __SDA_BASE;
} > ram
# Locate the ROM copy table into ROM after the
initialized data
_romp_at = __COPY_OF_DATA +
SIZEOF(.main_application_data);
.romp : AT (_romp_at)
{
__S_romp = _romp_at;
WRITEW(__COPY_OF_DATA);
#ROM start address
WRITEW(ADDR(.main_application_data));
#RAM start address
WRITEW(SIZEOF(.main_application_data)); #size
WRITEW(0);
WRITEW(0);
WRITEW(0);
}
_flashx_start = __COPY_OF_DATA +
SIZEOF(.main_application_data) +
SIZEOF(.romp);
# flashx working area spans across the whole rest of Flash memory
___FLASHX_START_ADDR = (_flashx_start + 0xfff) /
0x1000 * 0x1000;
___FLASHX_END_ADDR = ___INTERNAL_FLASH_BASE +
___INTERNAL_FLASH_SIZE;
.main_application_bss :
{
__START_SBSS = .;
*(.sbss)
*(SCOMMON)
__END_SBSS = .;
__START_BSS = .;
*(.bss)
*(COMMON)
__END_BSS = .;
} >> ram
.kernel_data : #AT(ADDR(.main_application_bss) +
SIZEOF(.main_application_bss))
{
___KERNEL_DATA_START =
ALIGN(0x10);
}
.end_of_kernel_data :
{
___KERNEL_DATA_END = .;
} > end_of_kd
.boot_stack :
{
_stack_end = .;
} > bstack
.end_of_boot_stack :
{
_stack_addr = .;
__SP_INIT = .;
___BOOT_STACK_ADDRESS = .;
} > end_bstack
}
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