The duty registers for each channel are double buffered so that if they change while the channel is enabled,the change will NOT take effect until one of the following occurs:
• The effective period ends
• The counter（PWMCNTx） is written (counter resets to $00)
• The channel is disabled
In this way, the output of thePWMwill always be either the old duty waveform or the new duty waveform,not some variation in between. If the channel is not enabled, then writes to the duty register will go directly to the latches as well as the buffer.
A change in duty or period can be forced into effect “immediately” by writing the new value to the duty and/or period registers and then writing to the counter（PWMCNTx）. This forces the counter to reset and the new duty and/or period values to be latched. In addition, since the counter is readable it is possible to know where the count is with respect to the duty value and software can be used to make adjustments.
上面的文字摘自S12的芯片资料。
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