废话不多，附上参考的文档地址 “ bbs点ednchina点com/BLOG_ARTICLE_1929131点HTM ”，这里面写的很详细的，照着来就可以了。如果对地址线的管脚分配有疑惑，可以参考
wiki点fpganotes点com/doku点php/edk:ip:emc
我照着这个文档开发，开始一切都顺利，到了generator bitstrem时，却出错了。错误如下：
ERROR:Pack:1107 - Pack was unable to combine the symbols listed
below into a
single IOB component because the site type selected is
not compatible. The
component type is determined by the types of logic and
the properties and
configuration of the logic it contains. In this case
an IO component of type
IOB was chosen because the IO contains symbols and/or
properties consistent
with output or bi-directional usage and contains no
other symbols or
properties that require a more specific IO component
type. Please double
check that the types of logic elements and all of
their relevant properties
and configuration options are compatible with the
physical site type of the
constraint.
说实话，真看不懂是什么意思。后来就是反复的在edk上折腾，还是不行。又后来，终于在网上搜到了，原来是管脚分配有问题，有一个管脚是input类型的，而在我的设计中是output类型的。真相大白。
这不完全是我的错，因为是管脚分配的资料文档上写错了。
通过这次事件，对fpga的管脚有了更多了解，想设计个fpga最小系统了，这样才能更好的学习fpga。
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