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一个非常简单的计划(A Really Simple Plan)  2009-04-06 15:40
32位微控制器正在变得越来越受欢迎,但8位芯片在市场中仍然有它们的地位。Tom说大多数公司在今后几年将会寻找并使用简单而且廉价的芯片。

The “8-Bits” Saga Continues

Thirty-two-bit microcontrollers are becoming more popular, but 8-bit chips still have their place in the market. Tom says major companies will be finding uses for the simple and inexpensive chips for years to come.

“8-bits is dead.”

That ’s what a micro marketing expert told me. What ’s funny is that he said that 30 years, and an untold billions of 8-bit chips, ago. But hold on. The story gets even better. A few years later, I bumped into this fellow again and learned he had moved on to a new job at a different chip company. Things were going quite well and he was making lots of money —selling 8-bit micros!

You ’ve heard me tell that story before, and no doubt I will tell it again. Yes, 32-bit MCUs are on the march and growth is explosive. And it ’s true there ’s an ever-shifting gray area between  “high-end ” 8-/16-bit chips and  “low-end ” 32-bit chips where it makes perfect sense for the latter to replace the former.But the problem with the 8-bit eulogies is that they ’re based on the premise that silicon is a zero-sum game. If 32-bit MCUs go up, that means 8-/16-bit MCUs must go down,right? Zero sum may be the way it is for some businesses,but not silicon. As long as  “Moore for Less ” is the name of the game, everybody wins.

And don ’t forget to look at the big picture. How many 8-/16-bit MCUs touch your life? They ’re in virtually every electronic gadget. Now consider developing societies on a global scale. Those folks are going to want lots of gadgets too.There ’s one more bit of evidence that ’s testimony to the staying power of our little friends. The fact is all the major players in the 8-/16-bit MCU biz continue to roll out new parts. That ’s hardly symptomatic of a  “dead ” market.

Freescale Semiconductor is no exception.They ’ve been one of the top players in the MCU market since the very beginning.And judging by the fact that they ’ve introduced a brand new 8-bit processor core, the  ’RS08, they plan on keeping it that way.

FORWARD TO THE PAST
To get a better understanding of what the new  ’RS08 core is all about, let ’s start with a bit of a history lesson.Like many other popular MCUs, the ’RS08 has roots that go way back, all the way to the 1970s when Freescalethen-Motorola introduced their first micro, the MC6800. The architecture of the MC6800 was blessedly simple, comprising little more than two 8-bit registers (A and B), an index register (X), and the usual stack pointer (SP), program counter (PC), and condition code (CC)registers (see Figure 1a).

Figure 1—Judging by the similarity between the original Freescale Semiconductor MC6800 (a) and the modern MC9S08 (b) you wouldn’t guess 30 years separates them. By contrast, the new Freescale MC9RS08 (c) is noticeably different.

Over the following decades (i.e., 1980s and 1990s), Motorola introduced a number of variations on the MC6800 theme.Along the way, there was a fork in the road with classic favorites like the MC68HC11 taking the high road and the down-sized MC68HC05 taking the low.

While the MC68HC11 and MC68HC05 remain mainstays in the catalog, the modern era (roughly corresponding to the Freescale spinout) has been centered on the core known as the ’S08. What ’s remarkable after some 30 years is how true the  ’S08 remains to the original (see Figure 1b). The menu has grown to include hundreds (heck, maybe thousands at this point) of distinct parts crafted from a few basic ingredients.

Given that history, the new  ’RS08 stands out by virtue of the fact that it ’s noticeably different, something immediately apparent with a glance at the programmers model (see Figure 1c). The MC6800 and its descendants were lean and mean, but the ’RS08 is positively anorexic. You ’ve all seen the movie Back to the Future, right? Well the ’RS08 is kind of a “Forward to the Past ” scenario, with Freescale introducing a core today that ’s architecturally simpler than the circa-1970s original.

After a glance at the programmers model, the first question that arises is how in the heck can the  ’RS08 get anything done? Yeah, there ’s an accumulator (A), but just how are you supposed to get data into or out of it with the disappearance of the index (X) register? The answer is a combination of direct addressing (i.e., memory address included in the instruction), paging, and an X index register in drag.

Figure 2—The ’RS08 memory map reveals details about the architecture. The direct address space is only 256 bytes ($0–FF), so higher addresses are accessed via a 64-byte “paging window” ($C0–FF). New TINY and SHORT addressing modes access low memory including fast access RAM, the emulated X index register, and the most frequently used I/O and control registers.

Here ’s how it works. The entire address space for the  ’RS08 is 16 KB,comprising 256 pages of 64 bytes (see Figure 2). But the direct addressing range tops out at just 256 bytes (i.e., 8-bit address) and the only instructions that can specify a longer address (i.e., the full 14 bits) are JMP and JSR. To provide data access to the entire 16 KB, the top 64 bytes of the direct address space (i.e.,page 3, direct addresses $C0-FF) are used as a window to any other page as specified with a page select (PAGESEL)register.

Figure 3—The X index register hasn’t gone missing. Instead, it’s emulated using a pair of memory locations (X and D[X]) in the TINY address space.

Index register X didn’t really disappear,it just morphed into a emorymappedemulation. As you can see in Figure 3, location $000F doubles as theX register (8 bits as in the MC68HC05)and location $000E in turn acts as aholder for the data addressed. Indeed,this scheme can partially emulateMC68HC05-indexed addressing (albeitmore slowly) to the point that theassembler accepts some traditional Xregister mnemonics as “psuedoinstructions” and automatically converts themto ’RS08 equivalents (i.e., access vialocations $000E and $000F).

Now let ’s focus a little on the  “R,” as in  “reduced,” aspects of the  ’RS08.While the maximum direct address is 8 bits, there are new  “SHORT ” (5-bit)and  “TINY ” (4-bit) direct-addressing modes that work with certain instructions.Carefully craft your data layout to put the most frequently accessed data in the TINY space (first 16 bytes). Meanwhile,the most frequently used I/O and control registers (including the aforementioned PAGESEL register) are mapped into the remaining SHORT space (bytes 17 – 32). In return for taking full advantage of the scheme, you get the speed and code density advantages of single-byte instructions (see Table 1).

Table 1—Thanks to new SHORT and TINY addressing modes, the lower 32 bytes of the address space are uniquely accessible with single-byte versions of the most common instructions.

SP is gone, and as you might imagine,so is the stack. Instead, there ’s just a “Shadow PC ” register (SPC) that acts as a single-level stack for interrupts and subroutine calls. In a pinch (e.g., you need nested subroutine calls), instructions to move data between the accumulator and the high and low bytes of SPC give you hooks to mimic a hardware stack (i.e., PUSH and POP macros).

Without getting sidetracked by the now rather tired RISC-versus-CISC debate, it ’s pretty clear that the  ’RS08 is still a CISC because instructions can operate directly on memory. It ’s just a “Complex Instruction Set Computer ” that happens to have a  “Reduced Instruction Set.” Given what you ’ve seen so far, it is no surprise that entire categories of traditional (i.e.,  ’S08)instructions (such as those having to do with SP and X) are vaporized. Further,even the instructions that remain have fewer variants (e.g., no 16-bit direct address mode, only zero-offset indexing).We ’re not talking about a minor weight loss. Considering both the number of basic instructions, as well as all possible opcodes (i.e., combinations of instruction and addressing mode), the  ’RS08 instruction repertoire is slashed to well under half the  ’S08. According to Freescale, the  ’RS08 core is fully 30%smaller than the  ’S08.

INTERRUPTS DISABLED
As you might expect, the absence of a “real” (i.e., hardware stack) poses a challenge for dealing with interrupts. The ’RS08 has a straightforward approach to the problem. If interrupts are a hassle,ditch them altogether. You heard me right. The  ’RS08 simply doesn ’t do interrupts, at least in the conventional sense.

There is a measure of attention-getting capability from the usual sources (i.e., internal peripherals and external pins). However, unlike a conventional interrupt scheme, a source request doesn ’t affect a running program. Rather, it does only two things. First, it sets a flag bit in a register, signifying the source.Second, it wakes up the processor if it ’s sleeping.

Needless to say, without true interrupts,there ’s certainly no need for the fancy add-ons such as vector, priority,and nesting schemes. If you ’ve already thrown out the baby, you may as well go ahead and throw out the bathwater.Instead, what passes for interrupt handling boils down to a combination of waking up (periodically and/or in response to an internal or external source event) and polling the event flag bits to determine the source.


Listing 1 shows a likely application software scenario. The program is an infinite loop (InfLoop) that simply waits (WAIT instruction) in low-power mode until awoken by an internal or external event. Then the program proceeds (P1) to scroll through the list of possible sources, checking the event flags and branching (via the BRSET branch-if-bit-set instruction) to the handler for the event that generated the wake-up call. After the handler does its thing, it returns to the beginning of the loop and goes back to sleep to wait for another call to action.

The polling order has two ramifications.First, it ’s a way to brute force the issue of priority because events higher up the list will be polled and, if pending,handled before those further down the list. It also means latency between the occurrence of the source event and entering the associated handler varies depending on the event ’s polling position.In the example shown here, at top speed (10-MHz bus cycle), the latency grows from about 1 to 3  μ s between the first (MTIM timer) and last (LVD lowvoltage detect) events in the polling order. Actual latency may be stretched even further depending on device-specific wake-up delays, such as the time it takes for an on-chip voltage regulator or clock generator to power-up and stabilize.

Is it conceivable to craft clever software to mimic the fancy features of a hardware interrupt controller? Sure, a pro could probably even cobble together some kind of midget RTOS. Is it a good idea? Probably not. If in doubt, I ’d say you ’re better off going with a bigger-ticket part (e.g.,  ’S08) that has a real stack and interrupts. On the other hand, there are many, many applications that can easily get by with the ’RS08 ’s simple scheme. When every penny counts, why pay for stuff you don ’t need?

MINI-MEM
The initial parts in the  ’RS08 line-up come with just 1 KB (MC9RS08KA1) or 2 KB (MC9RS08KA2) of flash memory.Follow-on parts have more, as you ’ll see shortly, but remember the architecture itself accommodates only a 16-KB address space. Notwithstanding the fact that  ’RS08 code density is enhanced by the 1-byte TINY and SHORT instructions,bloatware aspirations will surely be better served by a higher-end MCU.

Many flash memory MCUs feature in-application programming capability that enables code updates in the field and also allows portions of the flash memory to be used as a  “psuedo-EEPROM” for data storage. By contrast, it ’s important to note that the  ’RS08 flash memory is really intended to be programmed just once as it goes out of your factory door.

There are a number of datasheet specs that make this conclusion obvious.Unlike flash memory parts that can typically be written 10,000 or more times,the  ’RS08 flash memory write endurance spec is just 1,000 cycles. In their frenzy to jettison ballast, the  ’RS08 designers also tossed the charge pump needed to generate the higher flash memory programming voltage (12 V), so you ’re responsible for providing it externally.And while the flash memory is organized and programmed on a 64-byte row basis, there ’s only an all-or-nothing mass-erase capability. That means using the flash memory for multiple in-application writes would require a  “rolling ”update scheme that writes only once to a given location. For example, if you have 2 bytes of nonvolatile data you ’d like to update from time to time, allocating a 64-byte row of the flash memory would allow for 32 updates.

Nevertheless, anything is possible and Freescale even has an application note describing such a  “pseudo-EEPROM ”scheme.[1] It relies on moving a small flash-programming routine from flash memory into RAM for execution because flash memory access (e.g.,instruction fetch) is not allowed during programming. The technique is rather scary and fraught with peril because once flash memory programming is underway, any hiccup (“Oops, I forgot to disable the watchdog timer ”) could leave the part brain-dead. And while it ’s nice that code can be executed from RAM,don ’t get too excited because the MC9RS08KA1 and MC9RS08KA2 give you only 48 bytes to play with.

SMART DUST
Sticking with the  “small is beautiful ”theme, the MC9RS08KA1 and MC9RS08KA2 come with just six or eight pins. The largest (if you can call roughly 6 mm  × 10 mm large) of these is a vintage eight-pin DIP, which is useful for prototyping or cheap (e.g., singlesided through-hole) PCBs. You can cut the DIP ’s already small footprint in half by going surface mount with the optional eight-pin leaded SOIC package at just 5 mm × 6 mm.

Photo 1—The ’RS08 six-pin DFN package is so small it will erase your board space concerns.

If you ’re willing to give up a couple of pins, the six-pin (actually no pins,just pads) dual flat nonleaded (DFN)package represents a new low in board space. This Chihuahua is amazingly small at just 3 mm on a side and 1 mm thick (see Photo 1). Consider that you can cram half a dozen of the DFN parts in the footprint of the  “large ”eight-pin DIP.

Needless to say, with so few pins,there ’s no need for a bunch of fancy I/O. We ’re talking just the basics, split between general system functions and pin-oriented peripherals. The list starts with an on-chip regulator so the ’RS08 will run on any voltage you care to provide between 1.8 and 5.5 V.There ’s also a built-in clock system based on an on-chip 32-kHz oscillator and a bypassable frequency-locked loop. The clock is trimmable to achieve 2% accuracy across the entire voltage and temperature (– 40 ° to 85 °C)range. Given the cost-cutting bias and dearth of pins, I ’m not surprised there ’s no option for external clocking.For robustness,there ’s a watchdog timer, low-voltage detection, and a multisource RESET controller that accommodates the usual suspects such as power-up, power fail, watchdog timeout, and optionally even a pin. The RESET controller also keeps the street safe for programmers by busting code that ’s up to no good (e.g., illegal opcode, invalid address).

Because no one has figured out how to get rid of power and ground, the built-in I/O has just four (DFN package)or six (SOIC, DIP) pins to play with. Naturally, any or all can be used as parallel I/O with pull-up and pulldown options, as well as slew-rate control.Any or all can also serve as inputs to a keyboard interrupt module (KBI).Recalling that the  ’RS08 really doesn ’t have  “interrupts ” per se, the KBI ’s most likely use is to catch edges (rising,falling, either) and otherwise serve as a means to wake-up the processor from a low-power state.

Similarly, there ’s an analog comparator using up to three pins that can compare two external voltages to each other or to an internal reference voltage.You can choose to trigger on the rising, falling, or either edge of a comparator transition, and the comparator output can be routed to a pin.Freescale application note 3266 describes how to use the comparator to implement a poor man ’s ADC using the familiar R/C charge timing scheme (see Figure 4).[2]

Figure 4—The MC9RS08KA analog comparator can mimic a conventional ADC. Software discharges the RC and then the MTIM timer measures how long it takes to recharge to the level of the psuedo-ADC input.

The ADC emulation also uses the final piece of the I/O pie, the MTIM timer module. It ’s a simple unit with an 8-bit prescaler (1, 2, 4 …256 divide ratio) fronting an 8-bit counter. Various internal clock sources can be selected as the counter input or a pin can be devoted to the cause. Note that the MTIM module is not capable of waking up the processor from lowpower mode. Fortunately, you can configure the processor ’s own clock module to generate a periodic (e.g., 1 ms)wake-up call.

Let ’s not overlook the small matter of debug. The  ’RS08 background debug mode (BDM) provides the basic commands (e.g., read/write registers and memory, breakpoints, single-step) to get a handle on things. It ’s like a simple ROM monitor, but it is less intrusive (e.g., memory can be accessed without stopping the user program)and consumes no resources (e.g., flash memory or RAM) beyond the single pin (BKGD) used for host communication and flash memory programming.

MARKET SEGMENT
With the MC9RS08KA1 and MC9RS08KA2 staking their claim at the entry level, Freescale recently announced two high-integration ’RS08s, the  ’LE4 and the  ’LA8. In terms of the processor core itself,everything you ’ve read so far applies,except there ’s more memory (4 or 8 KB of flash memory and 256 bytes of RAM)and larger 28- and 48-pin packages.

The real difference, and reason for the extra pins, is a significant boost in the on-chip I/O capability with MCU mainstays such as UART, SPI, fancier timers, and a multichannel 10-bit ADC. The final I/O add-on, and raison d ’etre for the  ’L parts, is a built-in segment LCD controller.

Now I ’m quite sure there ’s an LCD marketing expert somewhere that has pronounced  “Segment LCDs are dead.”Yes, it ’s true that bitmap graphics LCDs (e.g., 1/4 VGA) are all the rage and don ’t require any upfront NRE for custom glass, a big advantage for lowvolume applications. But don ’t think the success of bitmap displays sounds the death knell for segment LCDs.They are still the best solution for high-volume apps where requirements for low unit cost and long battery life prevail. And that ’s not to say segment LCDs can ’t do eye candy. Witness some of the cool things being done in automotive dashboard displays, including free-form (i.e., nonrectangular)panels. Take a look around and you ’ll see segment LCDs are still a big deal in applications such as appliances,thermostats, calculators, glucose meters, not-so-smart phones, and hand-held test equipment (e.g., digital VOM). The list goes on. And just as with 8-bit MCUs in general, if segment LCDs are dead, why is it that heavyweights like Freescale and all of the other major players (Atmel,Microchip Technology, Texas Instruments,and more) keep introducing new segment LCD parts?

For the simplest (i.e., fewest segment)apps, you may be able to get away with a software bit-banging  “static ”approach that devotes a pin to each segment. But the number of segments (and thus pins) required can balloon fast. For example, a single alphanumeric digit requires up to 16 segments.

Enter the  “multiplexed ” alternative,which like a core memory of yore,uses an XY (frontplane and backplane in LCD-speak) electrode scheme,where a single pin controls multiple segments in a time division fashion,slashing the number of pins required.For instance, with 24 pins, a static controller can handle 24 segments. By switching to a multiplexed scheme with four back planes and 20 front planes, the same 24 pins can accommodate 80 segments.

The approach ups the ante in terms of processing and electronics complexity.LCD glass can be finicky with its demands for phase-shifting AC and carefully controlled voltage levels to avoid creating nearby  “ghost ” segments. Highsegment-count multiplexed LCD control is one of those duties where a little hardware can go a long way to make life easier for designers.

Featuring 4:1 and 8:1 mux options,the 28-pin MC9RS08LE and 44-pin MC9RS08LA can handle up to 112 and 168 segments, respectively.Embellishments include a pin-mapping feature that facilitates PCB and connector layout to reduce EMI and crosstalk. There are also a variety of power options that accommodate connection with different flavors of glass (e.g., 3 V, 5 V, ST, and STN). Another nice touch is a blink attribute that handles that annoying chore (e.g., the blinking colon on a digital clock)without bothering the processor.

Photo 2—Freescale’s introduction of the ’RS08 “L” series, and the evaluation kit that goes with it, proves that blue-collar technology (i.e., 8-bit MCUs and segment LCDs) lives on.

Freescale makes kicking the tires easy for you, and your budget, with the MC9RS08LE and MC9RS08LA evaluation kits that are a real bargain (see Photo 2). For just $59, you get a board with an LCD plus the usual trimmings (buttons, LEDs, a buzzer, and more).And the boards have the USB debugger interface built-in, so you don ’t need a separate pod. The kits also come with the venerable CodeWarrior suite and,because the code size restriction for the evaluation version is 32 KB (i.e., larger than the flash memory on any  ’RS08),you ’re essentially getting a proven and production-worthy  ’RS08 toolchain for free.

Just before going to print, one of the MC9RS08LA kits appeared on my doorstep. I didn ’t have time to do more than install the tools, fire it up,and poke around a bit. Once I jumped through the obligatory install hoops (install CodeWarrior, install the service pack, install USB drivers, download the demo project from the web,and configure CodeWarrior/project options), everything I tried (compile,download, debug, and more) worked without a hitch. One feature that stood out was that the toolchain has a simulator that goes beyond just opcodes to include  “full-chip ” (i.e.,pins) and even a measure of  “system ”simulation capability (see Photo 3).

Photo 3—The CodeWarrior ’RS08 toolchain that comes with the evaluation kit includes a full-featured simulator that encompasses software, hardware (MCU pins and peripherals), and even external I/O devices like the LCD.

While studying the MC9RS08LA board, I made an interesting discovery.Look closely at the right edge and you ’ll see a Freescale three-axis MEMS accelerometer. It is shown on the schematic, but otherwise isn ’t mentioned anywhere in the documentation. It ’s all the more a bargain to get two evaluation kits for the price of one.

KEEP IT SIMPLER
There is no doubt that some folks think all of this meat-and-potato technology is boring. But not me. I see the cost savings of these under-a-buck MCUs (well under for the smallest parts) passed on as a global  “Tech Tax ” cut for the masses. I see the milliamps-across-megaunits power savings as a green tsunami sweeping away a zillion batteries that would otherwise consume resources only to end up in a landfill. Dare I say I think this stuff is sexy and sure to spawn innovative applications. I applaud Freescale (and for that matter, all the other MCU suppliers hopping on the keep-it-real bandwagon) for standing up to the  “experts ” and naysayers who are enamored only with primadonna technology.

My only advice to Freescale and the others is remember to keep it simple. And then remember you’re supposed to remember to keep it simple. There are already plenty of feature-creeped, 8-bit MCUs to choose from. Don’t get me wrong, the higher-end parts are wonderful too and I’m not necessarily against reinventing the wheel. But like putting fat tires and tail fins on a go-kart, tarting up a mini-me MCU isn’t the way to do it.

I apologize to readers who’ve had to sit through my “8-Bit Lives” story before. And let me apologize in advance, because it’s a story I suspect I’ll be telling again and again.


Tom Cantrell has been working on chip, board, and systems design and marketing for several years. You may reach him by e-mail at tom.cantrell@circuitcellar.com.

REFERENCES
[1] J. Shi, “AN3741: Implement an In-Application-Programmable Data-Storage on the MC9RS08KA8,” Freescale Semiconductor, Inc., 2008.
[2] V. Ko, “AN3266: Getting Started with RS08,” Freescale Semiconductor,Inc., 2006.

SOURCE
MC9RS08KA, MC9RS08LA, and MC9RS08LE Microcontrollers
Freescale Semiconductor, Inc. | www.freescale.com
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