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The BYU Linux on FPGA's Project

BYU Configurable Computing Laboratory
Brent Nelson and Brad Baillio

Introduction

XIlinx boards containing PowerPC CPU's are now widely available and present an interesting target for Linux-based embedded systems development.  These include boards based on Virtex-II Pro as well as Virtex-4 FPGA's. The Xilinx XUPV2P board is a Virtex-II Pro board created by Xilinx for the XIlinx University Program (XUP).  This document describes installing an open-source Linux kernel on that board. 

However, the information provided herein is general and has successfully been used to install Linux on the Xilinx ML-403 board here at BYU.  The only difference had to do with the options used to create the SystemACE file.  Special considerations, if any, for installing on boards other than the XUP board are noted in the sections below.  See the final section of this document for a general wrap-up discussion on installing Linux on other boards.

To comment on or make corrections/suggestions to this writeup, please send mail to:

The information included in this document is all freely available on the WWW.  The point of this document is to pull it together from a variety of sources to created a more self-contained cookbook to aid students and researchers who are performing the steps described below for the first time.  In particular, this page was written to be used by our Computer Engineering senior project students in their work.  Thus, it provides step-by-step instructions to get them going, some of which may seem overly elementary to some users. 

This document assumes a working knowledge of the EDK and the ability to create, configure, and execute designs/programs on the XUP board.  At a minimum the EDK tutorials should be completed before starting with this document.  Better yet, creating a few different designs using the EDK and the Standalone software on the XUP board on your own would be good for laying the foundation required.

This work is based on the ML300 Linux port described in a fair amount of detail in:

     http://www.klingauf.de/v2p/index.phtml

and more recently at:

     http://www.crhc.uiuc.edu/IMPACT/gsrc/hardwarelab/docs/kernel-HOWTO.html#toc1. 

The port of Linux to the ML300 that these pages describe was done by MontaVista.  Klingauf seems to have been the first we have found to document a number of the steps required to use that port.  Morever, Klingauf has done a very good job of documenting the creation of the root file system part of the process.  However, the Klingauf page was for an older version of the EDK tools (the V2PDK) while the UIUC page is more recent and is for the EDK.

Parts of the current document closely follow and refer to those two prior documents.  In some places, the current document duplicates those previous documents.  The purpose of this document is to more fully elaborate on a number of the steps required to build and install the kernel, bring parts of these documents up-to-date w.r.t. the latest Xilinx EDK tools (7.1i sp2 as of the time of this writing), and describe a number of ways of booting the board (using the compact flash, diskless using NFS, etc).  The goal is that students and researchers can come up to speed in using Linux on a range of Xilinx development boards in a shorter time that we initially took.  Further, our intent is for this document to grow over time to include other topics which those desiring to use Linux on these boards can benefit from.  To that end, we solicit contributions from others using the boards.

Acknowledgements

The Klingauf page:

    http://www.klingauf.de/v2p/index.phtml

written by Wolfgang Klingauf provided significant information for this work. 

The UIUC page:

    http://www.crhc.uiuc.edu/IMPACT/gsrc/hardwarelab/docs/kernel-HOWTO.html#toc1

is part of a larger effort which is documented at:

    http://www.crhc.uiuc.edu/IMPACT/gsrc

These pages provide a number of helpful documents and quick start guides regarding setting up the design environment, tutorials on the EDK, and JumpStart guides to the ML300 and ML310 boards. 

We found that both guides were useful in our work and recommend them both to the reader. 

0. Our Build System

The version of EDK we used for this work was Version 7.1 SP2.  The ISE version was 7.1 SP3.  The WinXP box was running WinXP, Service Pack 2.  The Linux box used for parts was an i386 running Debian-sarge.  A Parallel-IV cable was used for configuring the FPGA since, at the time of this writing, XMD/GDB didn't seem to have full support for the Platform-USB cable.

Disclaimer: if you aren't comfortable with the EDK in general and programming the PPC's in the FPGA using the EDK, you should not continue.  The process we document below is not for EDK novices.  It assumes a solid (strong) foundation in the EDK, base system builder, and the non-Linux use of the XUP board.  If you are an EDK novice, you should consult other documentation and experiment with the board and create a variety of projects on the board before before you continue.  The UIUC pages referenced above are good sources for some of this.  The Xilinx-provided documentation is also a good place to start. 

1. Building the Hardware

To get started, build a hardware project using Base System Builder for the board. Include the following minimal set of modules:

PPC (set to 300MHz)
opb_sysace
opb_ethernet (no DMA)
DDR memory controller for your DDR DIMM
opb_uart_16550

Make everything interrupt-driven.  Leave the PPC O/S as stand-alone for both CPU's.

Also, under PLB BRAM IF CNTRL (last peripherals screen of base system builder), set the memory size to the max it will allow.  For the XUP board, this is 128KB.

Note: you must have your EDK project in a directory whose pathname doesn't contain spaces. Else, the BSP generation process described below will fail. Thus, anything in C:\Documents and Settings on a WinXP box will not work.

At this point, do a build and ensure that you can a simple "Hello, world"  program or the EDK-provided memory test application independent of Linux.  This will help increase the chances that if/when Linux doesn't boot, it isn't a hardware problem.  Remember to have the BootLoop program configured into BRAM in your software projects section in EDK.

2. Creating an ACE File

Using an ACE file allows you to more easily program the FPGA and load software on it than using a Parallel-IV cable and XMD.

To generate an ACE file from a Xilinx xygwin shell:

xmd -tcl genace.tcl -opt xupGenace.opt

where the file xupGenace.opt contains the following:

-jprog
-board user
-target ppc_hw
-hw implementation/download.bit
-elf TestApp_memory/executable.elf
-configdevice devicenr 1 idcode 0x1127e093 irlength 14 partname xc2vp30
-debugdevice devicenr 1 cpunr 1
-ace system.ace
 

Be sure to change the -hw and -elf lines to match your situation.

If you copy the resulting system.ace file onto a compact flash the board will configure from that bitstream and run that executable.  On the board be sure to set the switches so that it will boot from JTAG (this causes it to try to boot from the SystemACE controller).

Note #1: The Xilinx SystemACE controller is very particular about the parameters used to create the file system on the compact flash.  Yours may or may not have been created correctly.  The program mkdosfs is one way to correctly format a CF card.  On a WinXP box, run:

mkdosfs -s 64 -F 16 -R 1 F:

where F: is the compact flash's volume letter.  You can find the mkdosfs program on the WWW to usedownload and .

Note #2: Impact can be used to generate an ACE file as well.  However, as we use the command line method you will want to consult the documentation on Impact to learn how to do it from there. 

Note #3: Generating an ACE file for a board known to the Xilinx tools (such as the ML-403 board) is easier than for the XUP board.  Here are the instructions for the ML-403:

xmd -tcl genace.tcl -opt xupGenace.opt

where the file xupGenace.opt contains the following:

-jprog
-board ml403
-hw implementation/download.bit
-elf TestApp_memory/executable.elf
-ace system.ace

By telling it you are using the ml403 board, you need not specify a number of the other options since the tools know about that board.   Other Xilinx-specific boards can be handled in a similar fashion.  To see which boards are supported in this way, consult the genace.tcl file in the EDK installation directories.

3. Generate the BSP in EDK

The BSP (Board Support Package) is the set of files required so that Linux will compile and contain the required drivers and .h files for your board.

In EDK's software settings:

1. Set PPC_405_0 to use Linux kernel (linux_mvl31 version 1.01.a)
2. Under Library/OS Parameters:
   
   Set MEM_SIZE to size of DDR (example: 0x10000000 for 256MB).  Be sure it matches the DDR you configured into the board design  in the "Building the Hardware" section.
   
   Set PLB_CLOCK_FREQ_HZ to the PLB speed (usually 100000000)
   
   Set TARGET_DIR for where you want the board support package placed (use forward quotes or it will fail!) (I put it in /tmp and then later tar-ed it up). 
   
   Under connected_periphs you should add all of the devices you want Linux to know about.  In our case, we added the RS232, the ethernet mac, the SysAce, and the interrupt controller.
3. Run libgen from within EDK.

Pay attention to warnings.

Since  we are using the latest ethernet driver '1.00.f', the following fixes should be made to allow it to be used with the kernel we downloaded:

1. In file arch/ppc/platforms/xilinx_ocp/Makefile, make this change:

   xilinx_ocp-objs += xbasic_types.o xdma_channel.o xdma_channel_sg.o \
                  xipif_v1_23_b.o \
                  xpacket_fifo_v2_00_a.o xpacket_fifo_l_v2_00_a.o \
                  xversion.o

   The key point to note here is that there are two xpacket_fifo entries and the version used is newer than in the original Makefile. 

2. In arch/ppc/platforms/xilinx_ocp/xilinx_syms.c, the old V1.00.b XPacketFifo files are included and symbols are exported.  Change them to V200.a by modifying that file.
    

Finally, if you have problems with the BSP generation process, you can always go into:

.../EDK/sw/ThirdParty/bsp/linux_mvl31_v1_00_a/data/

and read the .tcl file that actually does the BSP generation to see what other restrictions on versions there are.

At this point you have a working bitstream and the BSP files required for Linux in /tmp. Tar up the BSP directory and move it to a Linux box.

It is now time to go to a Linux box and work on creating the Linux kernel.

4. Create a cross compiler for PPC

A cross-compiler will let you compile C-code to PPC machine code on an arbitrary host. In our case we use an x86 box running Linux to generate PPC executables.

In this section simply follow exactly the UIUC instructions.

We set the following parameters w.r.t. the UIUC instructions:

 %setenv TARGET powerpc-405-linux
 %setenv PREFIX /opt/${TARGET}

This will make /opt/powerpc-405-linux the place where the final cross compiler gets put.

We have encountered no problems getting the creation of the cross-compiler to work.  It just takes a few hours for it to run.

NOTE: as of the time of this writing, the line of interest in demo-ppc405.sh that is uncommented (and therefore gets used) starts with this:

     eval `cat powerpc-405.dat gcc-3.4.1-glibc-2.3.3.dat` ...

This specifies the precise combination of gcc/glibc that is to be used.  You may try other combinations but this work is based on the versions shown.

When it is done, go into /opt and find the PPC cross compiler tools directory that you have now created and add that directory to your path.

At this point, you can now compile C-code to PPC binaries on your i386 machine.  In other words, you have a cross compiler.

5. Get the Linux sources using bitkeeper:

As of July 1, 2005, bitkeeper as described in UIUC and Klingauf is no longer available.  This section uses a new client.

The free client is now available at bitmover.

Once you download it, unpack and build the free-client:

% /bin/sh bk-client.shar
% cd bk_client-1.1
% make

To download the repository source file, run the following from the command line:

% ./sfioball bk://ppc.bkbits.net/linuxppc_2_4_devel linuxppc_2_4_devel

The download will produce an editable copy of the repository source. Unlike the previous instructions found at UIUC and Klingauf's page, there is now no edit or clone command.  You just use the sources downloaded in the command above.

6. Configuring the Linux Kernel - the .config File

The Linux kernel will be built using the above-created cross compiler. The file .config is used to control which parts of Linux are included in the kernel. In our experience you have to be careful about what features of Linux you configure in and how you modify .config.  If you do it wrong you may encounter problems (things won't compile, you get errors about illegal declarations of things, etc).

You are not supposed to directly edit .config but are to either make xconfig or make menuconfig which run configuration programs. We found that using "make xconfig" as suggested by Klingauf DID NOT WORK- it turned on some features (without our knowledge) that resulted in code being included which would not compile. We use "make menuconfig" only. 

We suggest you start with a minimal .config file, get a working kernel, and then add features.  That is what we describe here.

The first step is to modify the Makefile so that the tools know you are going to build a PPC kernel. Make these changes in Makefile:

ARCH := ppc
CROSS_COMPILE = powerpc-405-linux-gnu-

Now, run "make menuconfig".

Below is one set of .config file features which we have used as a starting point.  Some of these are undoubtedly not used in our kernel but were turned on by default.  We have yet to experiment to find the minimal set of features required.  However, the following has worked and will get you started:

Code Maturity Level Options
   * Prompt for development and/or incomplete drivers

Platform Support
   * 40x Processor Type
   * Xilinx-ML300 Machine Type
   * Math emulation
   * TTYS0 device and default console
   * UART0

General Setup
   * Networking support
   * Sysctl support
   * System V IPC
   * Default bootloader kernel arguments
      "console=ttyS0,38400 root=/dev/xsysace/disc0/part3 rw"

Memory Technology Devices (MTD)
   * Memory Technology Device (MTD) Support
   * MTD partitioning support
   * RedBoot partition table parsing
   * Direct char device access to MTD devices
   * Caching block device access to MTD devices
   * RAM/ROM flash chip device drivers
   * Detect flash chips by Common Flash Interface (CFI) probe
   * Suport for AMD/Fujitsu flash chips

Block Devices
   * Xilinx on-chip System ACE
   * Loopback device support
   * Network block device support
   * RAM disk support
       (4096) Default RAM disk size
   * Initial RAM disk (initrd) support

Networking Options
   * Socket Filtering
   * Unix domain sockets
   * TCP/IP networking
   * IP: multicasting
   * IP: kernel level autoconfiguration
   * IP: DHCP support
   * IP: TCP syncookie support (disabled per default)

Network Device Support
   * Network device support
   * Ethernet(10 or 100Mbit)
   * Ethernet (10 or 100Mbit)
   * Xilinx on-chip ethernet

Character devices
   * Standard/generic (8250/16550 and compatible UARTs) serial support
   * Support for console on serial port
   * Unix98 PTY support

File systems
   * Journaling Flash File System v2 (JFFS2) support
       (0) JFFS2 debugging verbosity (0=quiet, 2=noisy)
   * Virtual memory file system support (former shm fs)
   * /proc file system support
   * /dev file system support (EXPERIMENTAL)
   * Automatically mount at boot
   * /dev/pts file system for Unix98 PTY
   * Second extended fs support
   * Network file systems
   * NFS file system support
   * Provide NFSv3 client support
   * Root file system on NFS
   * NFS server support
   * Provide NFSv3 server support
   * SMB file system support (to mount Windows shares etc.)
   Native Language Support
      Default NLS Option: "iso8859-1"

Kernel hacking
   * Kernel debugging
   * Include BDI-2000 user context switcher
   * Add any additional compile options
   Additional compile arguments: "-g -ggdb"
     (0) Kernel messages buffer length shift (0=default)