Amid the rush of domestic AI chips toward large model training and cloud inference, Vimicro Technology has shifted its focus to the edge and endpoint, targeting "perception" and "security"—two domains that may appear less flashy but are rapidly becoming essential requirements.
"Traditional GPUs certainly offer high performance, but they also consume massive power. How can you deploy them at the edge and endpoint? Edge and endpoint scenarios are typically complex environments rather than single, large-scale computing tasks." At the recently held ICDIA, Shi Qingping, Chief Engineer of Vimicro Technology Co., Ltd., provided a rational assessment of edge AI chips.
Shi Qingping, Chief Engineer of Vimicro Technology Co., Ltd.
With over two decades of chip R&D history, this enterprise is carving out a differentiated path in the fierce edge AI chip competition using a multi-core heterogeneous processor architecture named "XPU".
XPU: An Earlier Heterogeneous Vision Than "CPU+GPU"
"We proposed the XPU multi-core heterogeneous architecture over a decade ago. At that time, we were likely the first in the industry to coin this term," Shi Qingping pointed out in an interview with media outlets including EEFocus.
This timeline is significant—at that time, the concept of AI chips was not yet widespread, and the dominance of GPUs in deep learning was far from established. The XPU proposed by Vimicro integrates multiple cores of diverse architectures, including CPU, GPU, NPU, VPU (video codec), and ECU (encryption/decryption), onto a single chip. These are uniformly managed through a data-driven mechanism and a dedicated scheduling unit.
"It is not just a matter of simply putting them together," Shi Qingping emphasized. "How do you integrate so many architectures? How do you schedule tasks? Essentially, everyone recognizes these challenges and aims to implement similar technologies on their own chips."
According to Shi Qingping, the limitations of the traditional CPU+GPU architecture are evident: the CPU handles scheduling while the GPU handles computing, resulting in significant data copying and bus latency between them, along with a relatively rigid processing flow. In contrast, XPU enables data sharing and zero-copy among multiple cores through "data-driven on-chip computing," substantially reducing latency.
"Previously, scheduling via the CPU resulted in considerable latency, and the utilization efficiency of each core was not high either," Shi Qingping explained. "With data-driven execution, the CPU only handles configuration, and the rest runs automatically. In the surveillance camera sector, a single processing pipeline can be made faster than traditional NVIDIA chips, basically achieving around 30 milliseconds, while simultaneously integrating the encryption process."
Regarding security, XPU incorporates an independent memory management module within the chip. "One issue is memory sharing, and the other is memory overflow. A massive number of hacker attacks are based on memory overflow. In this regard, we can now enhance security."
SVAC Standard: A "Security Barrier" Forged Over Two Decades
If XPU serves as the "technical foundation" for Vimicro Technology, then the SVAC national standard acts as its "application moat."
SVAC (Digital Video and Audio Codec Technology Standard for Public Security Video Surveillance) is a national standard promoted and formulated by the MIIT (Ministry of Industry and Information Technology), the MPS (Ministry of Public Security), and other departments. Vimicro Technology served as the co-leading unit in developing this standard. Shi Qingping introduced that the core feature of SVAC is "integrating video, sensor, and spatial data into a single bitstream, while applying source encryption and data signatures to this bitstream... This resolves the issues of video data tampering and leakage at the source level."
In practical applications, SVAC enables "hierarchical encryption"—ordinary users view mosaic-blurred videos, while high-privilege users can see the original footage. "Facial features must not be distorted; even a slight deviation will invalidate the masking effect," Shi Qingping stated.
The value of this standard is now expanding beyond the security sector. In industrial vision, Shi Qingping cited a coal mining production scenario: "There is a lot of fraud. For instance, two systems might be running—one for internal use and another for management to inspect. How do you solve this? Simple encryption won't work." Through SVAC's data signature technology, video data is ensured to be "tamper-proof and rapidly traceable."
From Security to Automotive: Gradual Scenario Expansion
Vimicro Technology's traditional strengths lie in security and smart cities. Shi Qingping revealed that the company has accumulated extensive application scenarios across smart cities, public security, intelligent transportation, ecological environmental protection, and the Industrial Internet.
In the automotive sector, Vimicro Technology's "StarSmart IV" chip passed the AEC-Q100 automotive-grade certification in December 2025. "It can be utilized in core automotive electronic scenarios, including Advanced Driver Assistance Systems (ADAS), in-vehicle visual perception systems, and smart cockpit monitoring." However, Shi Qingping pointed out, "Currently, it is primarily used in auxiliary domains rather than as the main chip. In the future, it is possible to view the entire vehicle, along with future robots, as part of embodied intelligence."
In industrial vision, Vimicro Technology is already actively involved in applications. Shi Qingping provided an example: "A bottle might go through five or six processes on a production line. Where exactly was each process performed? It was difficult to trace in the past. Through multi-dimensional fusion technology, various data streams are integrated into a single system architecture. Coupled with data signature technology, this ensures the data remains tamper-proof and allows for rapid tracing."
"Xingyuan AI Agent": Generalized Recognition + Large Model Fine Screening
In April 2026, at the 9th Digital China Summit, the National Key Laboratory of Digital Perception Chip Technology and the Vimicro Technology team jointly launched the "Xingyuan AI Agent" based on XPU chips. This achievement builds upon the "StarSmart V" XPU chip released in 2025, which is claimed to be the world's first embedded AI chip capable of running both general language large models and visual large models simultaneously on a single chip.
The core concept of the "Xingyuan AI Agent" is "generalized recognition at the front end, and large model fine screening at the back end"—functioning as an initial screening followed by a detailed screening. "When implemented using small models previously, each scenario required a dedicated model and specific training data, which was highly cumbersome," Shi Qingping said. "Currently, we are deploying around a dozen models that are already in operation. The scenarios for generalized applications will be vast. For some recent ad-hoc projects, we can basically implement the application functions within one to two weeks, meeting deployment-level requirements."
Within the integrated endpoint-edge-cloud architecture, the "Xingyuan AI Agent" serves as a core hub, building a "low-cost, highly secure, and energy-efficient computing system." Shi Qingping mentioned, "We already possess substantial computing power at the front end. How do we utilize it? By running visual large models at the endpoint and edge for initial screening, and executing true multimodal large models at the back end for detailed screening."
The most mature scenarios "are all related to smart cities, including community services, urban management, public security, smart transportation, as well as fields like wildlife protection and energy."
Realistic Challenges: Process Node, Power Consumption, and Ecosystem
Beyond the technical vision, Shi Qingping maintains a clear understanding of the practical challenges facing edge AI chips.
"Both the edge and endpoint face a major limitation: power consumption and heat generation. High power consumption leads to high heat generation, necessitating heat dissipation solutions, which significantly increases the overall size," Shi Qingping said. "To miniaturize it, one aspect is optimizing chip design, including architectural optimization. However, to a large extent, the issue of chip process nodes cannot be avoided—this is a common challenge for everyone. Mitigating it partially through process nodes and partially through chip design cannot completely offset the issue."
Cost presents another challenge. "The edge and endpoint are not like GPUs, which have maintained relatively high prices since the AI boom. The edge and endpoint are essentially a red ocean market, making cost optimization a critically important aspect."
Ecosystem development is equally challenging. "A significant portion of the application challenges we face stems not from the chips themselves, but from the standards we are promoting," Shi Qingping candidly stated. "In reality, it remains an issue within the domestic localization ecosystem. I believe companies involved in Xinchuang (Information Technology Application Innovation) face similar situations. We started over a decade ago, and it was only in recent years, as Xinchuang gradually gained momentum, that our business experienced substantial growth."
Looking to the future, Shi Qingping highlighted two directions: first, the continuous evolution of XPU technology, "including the integration of new technologies"; and second, at the AI model level, "combining new mechanisms driven by knowledge to resolve the hallucination issues of large models. This is crucial because many of the application scenarios we face—such as industrial vision and industrial control—cannot tolerate errors."
Conclusion
From the "StarSmart I" multimedia chip in the early 2000s to the "Xingyuan AI Agent" in 2026, Vimicro Technology has traversed a chip R&D journey spanning over two decades. In today's increasingly crowded AI chip sector, this "veteran" enterprise has chosen a differentiated path centered on the keywords "intelligence," "perception," and "security"—utilizing the XPU multi-core heterogeneous architecture as its computing foundation, leveraging the SVAC national standard to build a security barrier, and expanding application scenarios through "endpoint-edge-cloud integration."
As Shi Qingping stated in his speech: "From the lowest-level performance of the chip to the highest-level application, we are building a vertical integration, truly reflecting technical capabilities from the foundational layer up to the actual scenarios of top-tier applications." At the industry inflection point where edge AI transitions from an "optional choice" to a "mandatory requirement," whether Vimicro Technology can unlock greater market space with its "chip + standard + application" vertical integration capability is a question that only time will answer.