软件:Quartus
语言:VHDL
代码功能:
使用有限状态机(FSM)来实现摩尔斯电码编码器,实现ABCDEFGH这些字母的摩斯电码。
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
演示视频:
设计文档:
使用有限状态机(FSM)来实现摩尔斯电码编码器。摩尔斯电码使用长短脉冲的组合来表示信息。每个字母都表示为一系列点(短点(一个短脉冲)和划线(一个长脉冲)。例如,字母表的前八个字母有以下表示:
顶层结构图如下
1. 工程文件
2. 程序文件
3. 程序编译
4. Testbench
5. 仿真图
部分代码展示:
LIBRARY ieee; USE ieee.std_logic_1164.all; ENTITY L7P4 IS PORT(KEY:INstd_logic_vector(3 DOWNTO 0); SW:INstd_logic_vector(9 DOWNTO 0); CLOCK_50:INstd_logic; --LEDR:OUT std_logic_vector(9 DOWNTO 0));-- UNCOMMENT when targetting DE1 LEDG:OUT std_logic_vector(9 DOWNTO 0));-- UNCOMMENT when targetting DE0 END L7P4; ARCHITECTURE mixed OF L7P4 IS COMPONENT shiftrne IS GENERIC ( N : INTEGER := 4 ) ; PORT ( R : IN STD_LOGIC_VECTOR(N-1 DOWNTO 0) ; L, E, w : IN STD_LOGIC ; Clock : IN STD_LOGIC ; Q : BUFFER STD_LOGIC_VECTOR(N-1 DOWNTO 0) ) ; END COMPONENT; COMPONENT half_sec_timer IS PORT ( Clk, Start : IN STD_LOGIC ; Done : OUT STD_LOGIC); END COMPONENT; SIGNAL Clk, nReset, w, z, SEnable, TStart, TDone : std_logic; SIGNAL LR, CR, QL, QC : std_logic_vector(3 DOWNTO 0); -- length and code values and shift register contents SIGNAL sel : std_logic_vector(2 DOWNTO 0); TYPE state_t IS (Init, Gen_dot, Jud_nxt, Pulse_1, Pulse_2, Pulse_3, Gen_nxt, Dash_nxt, Gen_nxt_dot, Gen_nxt_dash); -- add to state list as needed SIGNAL y_Q, Y_D : state_t; BEGIN Clk <= CLOCK_50; nReset <= KEY(0); w <= NOT KEY(1); -- start signal sel <= SW(2 DOWNTO 0); --LEDR(3 DOWNTO 0) <= QC; -- code register-- UNCOMMENT when targetting DE1 --LEDR(7 DOWNTO 4) <= QL; -- length register-- UNCOMMENT when targetting DE1 --LEDR(9) <= z; -- Morse output symbol-- UNCOMMENT when targetting DE1 LEDG(3 DOWNTO 0) <= QC; -- code register-- UNCOMMENT when targetting DE0 LEDG(7 DOWNTO 4) <= QL; -- length register-- UNCOMMENT when targetting DE0 LEDG(9) <= z; -- Morse output symbol-- UNCOMMENT when targetting DE0 LEDG(8) <= '0'; WITH sel select CR <= "0010" WHEN "000", -- code register 0=dot, 1=dash, listed from lsb on right to msb on left "0001" WHEN "001", "0101" WHEN "010", "0001" WHEN "011", "0000" WHEN "100", "0100" WHEN "101", "0011" WHEN "110", "0000" WHEN "111", "0000" WHEN OTHERS; WITH sel select LR <= "0011" WHEN "000", -- length register in unary from lsb on right "1111" WHEN "001", "1111" WHEN "010", "0111" WHEN "011", "0001" WHEN "100", "1111" WHEN "101", "0111" WHEN "110", "1111" WHEN "111", "0000" WHEN OTHERS;
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