PCI9054控制设计Verilog代码ISE仿真

名称：PCI9054控制设计Verilog代码ISE仿真

软件：ISE

语言：Verilog

代码功能：PCI9054控制

FPGA代码Verilog/VHDL代码资源下载：www.hdlcode.com

演示视频：

设计文档：

1. 工程文件

2. 程序文件

3. 程序编译

4. Testbench

5. 仿真图

部分代码展示:

`timescale 1ns / 1ps
module pci9054_lbus(
    input               rst,
    input               lclk,
    
    input               lhold,
    output reg          lholda,
    input               ads_n,
    input               blast_n,
    output reg          ready_n,
    
    input     [3:0]     lbe,
    input     [7:0]     ld,
    input               lwr_n,
    input     [31:2]    la
    );
//------------------------------------------------------------------------------//
//parameter
//------------------------------------------------------------------------------//
    parameter   [1:0]       IDLE        = 2'd0,//空闲状态
                            WAIT        = 2'd1,//等待状态
                            TRANS       = 2'd2;//数据传输
                            
//------------------------------------------------------------------------------//
//wire
//------------------------------------------------------------------------------//
//------------------------------------------------------------------------------//
//reg
//------------------------------------------------------------------------------//
    reg     [1:0]       c_s = 2'd0 ,n_s = 2'd0;
//------------------------------------------------------------------------------//
//main code
//------------------------------------------------------------------------------//
    //状态机第一段
    always@(posedge lclk)begin
        if(rst)
            c_s <= 2'd0;
        else
            c_s <= n_s;
    end
    
    //状态机第二段 状态转换
    always@(*)begin
        case(c_s)
            IDLE:
                if(ads_n == 0)   
                    n_s = WAIT;
                else
                    n_s = IDLE;
            WAIT:
                n_s = TRANS;
            TRANS:
                if(blast_n == 0)
                    n_s = IDLE;
                else
                    n_s = TRANS;
            default:n_s = IDLE;
        endcase
    end

点击链接获取代码文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=1148